1. Field of the Invention
This invention is generally related to receivers in a communication system. More particularly, this invention is related to removal of precursor intersymbol interference from encoded signals received on a communication channel.
2. Description of the Related Art
In digital communication systems such as the popular Fast Ethernet, digital data is formatted to a pulsed multilevel voltage signal to be transferred through a communication channel such as common telephone wire, fiberoptic cable or open atmosphere. It is well known in the art that as the pulsed multilevel voltage signal transits the communication channel, the communication channel acts as a low pass filter and that the pulsed multilevel voltage signal becomes a continuous time signal. The low pass filter spreads or smears the shape of the input pulsed multilevel voltage signal to form the continuous time signal.
The operation can be described mathematically by the convolution of the function of the pulsed multilevel voltage signal x(t−τ) by a continuous time channel response h(t). That is
                                                                        r                ⁡                                  (                  t                  )                                            =                                                ∫                                      -                    ∞                                                        +                    ∞                                                  ⁢                                                      h                    ⁡                                          (                      τ                      )                                                        ⁢                                      x                    ⁡                                          (                                              t                        -                        τ                                            )                                                        ⁢                                                                          ⁢                                      ⅆ                    t                                                                                                                          =                                                ∫                                      -                    ∞                                                        +                    ∞                                                  ⁢                                                      x                    ⁡                                          (                      τ                      )                                                        ⁢                                      h                    ⁡                                          (                                              t                        -                        τ                                            )                                                        ⁢                                                                          ⁢                                      ⅆ                    t                                                                                                          EQ        .                                  ⁢        1                            where:                    r(t) is the received continuous time signal,            h(t) is the channel response            x(t) is the pulsed multilevel voltage signal.The second half of the formula is a result of the fact that convolution is a commutative process.                        
The pulsed multilevel voltage signal is expressed as the functionx(t)=0 for t≠T x(t)=Xkδ(t−kT) for t=kT                 where:                    T is the period of a symbol of the encoded digital data,            k is a counting variable representing integral periods of the symbols,            Xk is the voltage level of the pulsed multiple level voltage signal a the time kT.As is known in the art, the significant values in the integration occur whereτ=KT.                         
Therefore, the integration of Eq. 1 can be rewritten as:
                              r          ⁡                      (            t            )                          =                              ∑                          -              ∞                        ∞                    ⁢                                    x              k                        ⁢                          h              ⁡                              (                                  t                  -                                      k                    ⁢                                                                                  ⁢                    T                                                  )                                                                        EQ        .                                  ⁢        2            EQ. 2, as written, still represents a continuous time system rather than the discrete time system employed in most digital communication systems. In pulse amplitude modulated systems, such as Ethernet, the sampling rate of the discrete time system is at the symbol transmit rate (1/T) and therefore can be written as:
                              r          ⁡                      (                          n              ⁢                                                          ⁢              t                        )                          =                              ∑                          -              ∞                                      +              ∞                                ⁢                                    x              k                        ⁢                          h              ⁡                              (                                                      n                    ⁢                                                                                  ⁢                    T                                    -                                      k                    ⁢                                                                                  ⁢                    T                                                  )                                                                        EQ        .                                  ⁢        3            This can be rewritten as:
                              r          ⁡                      (                          n              ⁢                                                          ⁢              T                        )                          =                              ∑                          -              ∞                        N                    ⁢                                    x              k                        ⁢                          h              ⁡                              (                                                      n                    ⁢                                                                                  ⁢                    T                                    -                                      k                    ⁢                                                                                  ⁢                    T                                                  )                                                                        EQ        .                                  ⁢        4            
Since the sampling clock of a receiver generally is not perfectly aligned with the clock of the transmitter of the communication system, the sampling phase offset will be non-zero. To account for the arbitrary phase offset, EQ. 4 is rewritten to add an offset time to the time index. EQ. 4 is now written as:
                              r          (                      nT            +                          t              0                                ⁢                                          )                =                              ∑                          -              ∞                        N                    ⁢                                    x              k                        ⁢                          h              ⁡                              (                                                      t                    0                                    +                                      n                    ⁢                                                                                  ⁢                    T                                    -                                      k                    ⁢                                                                                  ⁢                    T                                                  )                                                                        EQ        .                                  ⁢        5            The first term of EQ. 5 is the component of the received signal of the nth symbol. The remaining terms in the summation are intersymbol interference (ISI) terms, previous symbols (postcursor intersymbol interference) and subsequent symbols (precursor intersymbol interference).
Refer now to FIG. 1a to discuss a typical communication system. The digital data is scrambled, encoded and formed into a symbol that forms the pulsed multilevel voltage signal ai 5. The pulsed multilevel voltage signal ai 5 is transferred to the communication channel 10. The communication channel 10, as described above, has the impulse response h(t) and acts as a low pass filter to distort the pulsed multilevel voltage signal ai 5. The communication channel 10 includes the driver circuitry, receiver circuitry and the connecting transmission medium. FIG. 1b is a plot of the magnitude of the received pulsed multilevel voltage signal airec 12 versus frequency. As is shown, the frequency content of the received pulsed multilevel voltage signal airec 12 contains the frequencies of the previous and subsequent symbols of the received pulsed multilevel voltage signal airec 12. To demonstrate the frequencies EQ. 5 is reorganized with the magnitude of the pulsed multilevel voltage signal ai 5 included as follows:a. airec=ai+1f=1+aif0+ai=1f+1+ . . .  EQ. 6
The output of communication channel 10 is the input to an analog-to-digital converter (ADC) 15. The analog-to-digital converter 15 samples the received signal from the communication channel to create the sampled digitized version hk 25 of the received signal. The sampled digitized version hk 25 of the received signal contains the precursor and postcursor intersymbol interference described above. Removal of the precursor intersymbol interference is accomplished by the feed forward filter 30. The decision feedback filter 70 accomplishes the removal of the postcursor intersymbol interference (ai−1f+1+ . . . of EQ. 6).
The feed forward filter 30 consists of multiple delay elements 35a, 35b, 35c and 35d that are serially connected output to input. The input of the first delay element is connected to the analog-to-digital converter 15 to receive the sampled digitized received signal hk 25. Each delay element 35a, 35b, 35c and 35d delays the sampled digitized received signal hk by the amount of time of the period of the sampling clock of the analog-to-digital converter 15. The outputs of the analog-to-digital converter 15 and the delay elements 35a, 35b, 35c and 35d respectively are connected to the multiplier circuits 40a, 40b, 40c, 40d and 40e. Each delayed version of the sampled digitized received signals is multiplied by one of the filter coefficients wx, 45a, 45b, 45c, 45d and 45e. The output of each of the multiplier circuits 40a, 40b, 40c, 40d and 40e are connected to the combining circuits 50a, 50b, 50c and 50d. The combining circuits 50a, 50b, 50c and 50d additively combine the resulting products from the multiplier circuits 40a, 40b, 40c, 40d and 40e to form the sampled digitized signal fk 55 having the precursor intersymbol interference removed.
The filter coefficients wx, 45a, 45b, 45c, 45d and 45e normally are chosen as a function of an error signal ek determined as the difference of the estimated value âi 95 of pulsed multilevel voltage signal ai 5 and the sampled digitized signal gi 62 having the total intersymbol interference removed. That is:ek=(gi−âk)
The sampled and digitized signal fk 55 having the precursor intersymbol interference removed and the output of feedback filter 70, which is the calculated postcursor intersymbol interference, are subtractively combined in the combining circuit 60. The output of the combining circuit 60 is the input to the decision circuit 65. The decision circuit 65 determines the received estimate âi 95 of the pulsed multilevel voltage signal ai. The received estimate âi 95 is the input of the feedback filter 70. The feedback filter 70 has multiple delay elements 75a, 75b, and 75c that are serially connected to delay the received estimate âi 95 by a time equal to the period of the sampling clock of the analog-to-digital converter 15. The outputs of the delay elements 75a, 75b, and 75c are the inputs to the multiplier circuits 80a, 80b, and 80c. The multiplier circuits multiply the delayed received estimates âi by the filter coefficients fx 80a, 80b, and 80c. The products of the multiplier circuits 75a, 75b, and 75c are additively combined in the combining circuit 90 to form the estimate of the postcursor intersymbol interference to be removed from the received, sampled and digitized pulsed multilevel voltage signal fk 55.
The filter coefficients fx 85a, 85b, and 85c are adaptively chosen by tracking the error signal ek that is determined as the difference of the estimated value âi 95 of pulsed multilevel voltage signal ai 5 and the sampled digitized signal gi 62, which is the output of the combining circuit 60.
In EQ. 5, it is apparent that the sampling phase offset contributes to the magnitude of the precursor and postcursor intersymbol interference. The better aligned the sampling clock and the transmit clock, the less intersymbol interference in the sampled digitized version of the received signal hk 25. The timing phase adjustment signal φsamp 20 is used to adjust the sampling position within the period of the pulsed multilevel voltage signal ai. A clock extraction circuit and a phase-locked loop generally establish the timing of the sampling clock of the ADC. Thus, the sampling phase, the filter coefficients wx 40a, 40b, 40c, 40d, and 40e, and the filter coefficients fx 85a, 85b, and 85c are interdependent in fully adaptive systems. It is desirable to uncouple the sampling phase and the filer coefficients wx 40a, 40b, 40c, 40d and 40e to find the best combinations of values and to improve stability.
In magnetic recording media, the nonlinear effects in the write process appear in the readback waveform as shifts in the peak positions and changes in the amplitude. The pulse shift causes a nonlinear intersymbol interference (ISI) on the readback signal. “Adaptive Nonlinear Decision Feedback Equalization With Channel Estimation And Timing Recovery In Digital Magnetic Recording Systems” (Lin et al.), IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, Volume: 42 3, IEEE, pp. 196-206 describes a Volterra-DFE, in which a Volterra filter is used in the feedback section of decision feedback structure to equalize the nonlinear ISI.
U.S. Pat. No. 5,159,291 (Ghoshal) discloses a digitally controlled timing recovery loop with low intrinsic jitter and high jitter tolerance. The timing recovery loop has a triple loop structure for improved jitter tolerance and bandwidth control.
U.S. Pat. No. 5,430,661 (Fisher, et al.) teaches an adaptive decision feedback equalizer. The adaptive decision feedback equalizer operates in either a set-up/test mode or a run mode. The read signals input from a storage media are sampled, amplified and digitally processed to decode store information bits with the result that storage density may be increased and error rate decreased.
U.S. Pat. No. 5,822,143 (Cloke, et al.) describes a partial-response maximum-likelihood (PRML) sequence detector with decision feedback equalization (DFE) for a disk drive read channel. A DFE circuit generates a sequence of equalized samples and includes a feed forward filter that removes precursor ISI from the sequence of sample signal to produce a sequence of feed-forward equalized samples, detection logic that translates the sequence of equalized samples into a sequence of detected symbols and a feedback filter that filters the sequence of detected symbols to produce a sequence of equalization feedback values to offset postcursor ISI remaining in the sequence of feed-forward equalized samples.